1. Field of the Invention
The present invention relates to a display control system for performing display/drive control of a flat panel display such as an LCD (Liquid Crystal Display) at the CRT display timing of a CRT (Cathode Ray Tube) controller.
2. Description of the Related Art
In a conventional system, display control of a CRT display requires a vertical sync signal and a vertical blanking period. In contrast to this, display control of an LCD does not require a long vertical blanking period as in CRT display drive. For this reason, LCD and CRT displays have different display timings for display/drive operations.
If, therefore, a laptop personal computer having, e.g., an LCD is designed to allow connection of a CRT display as an option, a display timing circuit specially designed for an LCD display drive and a display timing circuit specially designed for a CRT display drive must be independently prepared. In addition, since a circuit for switching the display timing circuits is required, the arrangement of the computer is considerably complicated.
Furthermore, when an LCD is applied to a plurality of different types of display resolutions (e.g., 640.times.350 dots, 640.times.400 dots, and 640.times.480 dots) with different numbers of display lines (total horizontal display line counts in the vertical direction), an interface circuit for switching the display resolutions is required. Therefore, the arrangement of the interface circuit is complicated. The above prior art will be described below with reference to FIGS. 1 through 4D.
FIG. 1 is a block diagram showing a circuit arrangement of a conventional LCD. In the conventional arrangement shown in FIG. 1, an X driver 1 and a Y driver 3 are driven/controlled by various types of timing signals, and display data loaded in a shift register in the X driver 1 is displayed on an LCD panel 5. The above-mentioned timing signals include a latch pulse LP corresponding to a one-line period, a field pulse FP corresponding to a one-frame period, and a shift clock SCK for loading data in the shift register in the X driver 1. Note that signal lines 9 extending from the x driver 1 and signal lines 7 extending from the Y driver 3 are arranged in the LCD panel 5 in the form of a matrix.
In the LCD having such an arrangement, specific lines of the LDC panel 5 are selected by shift clock pulses generated by the Y driver 3 and supplied through the signal lines 7, and data output from the X driver 1 through the signal lines 9 are respectively supplied to the selected pixels, thus displaying the data on the screen.
FIGS. 2A through 4D are timing charts of signals in the vertical and horizontal directions in a case wherein a display resolution of 640.times.480 dots is set. FIGS. 2A and 2B are timing charts in the horizontal direction of a CRT display. FIGS. 3A through 3C are timing charts in the vertical direction of the CRT display. According to the timing in the horizontal direction shown in FIGS. 2A and 2B, the latch pulse LP shown in FIG. 2A is input in a horizontal non-display period shown in FIG. 2B. In the timing charts in the horizontal direction, after 480 lines (0-479) shown in FIG. 3B are displayed, a vertical non-display period appears, as shown in FIG. 3C.
FIGS. 4A through 4D are timing charts of the LCD. Display data of all the lines of one frame are sequentially output from the X driver 1 in units of lines. The display data is supplied to the LCD panel 5 through the signal lines 9, and one frame is formed in [vertical display period+vertical non-display period].
The LCD requires no non-display period in consideration of the principle of driving operation (i.e., display data is latched in the X driver 1, specific lines are selected by the Y driver 3, and the X driver 1 sequentially displays the data through pixels corresponding to the selected lines). For this reason, the operation timing of the conventional LCD is set such that a non-display period is minimized. That is, the operation timing of the LCD is independently set and is different from that of the CRT display. Therefore, in a conventional laptop personal computer which has a standardized LCD and allows connection of a CRT display as an option, display timings for an LCD and an CRT display are independently generated and set in a CRT display controller. In such an arrangement, however, the LCD and the CRT display cannot be simultaneously driven to display information.
Furthermore, if a system has a plurality of display resolutions, the following problem is posed. Assume that the total number of horizontal display lines in the vertical direction of a frame to be displayed on the LCD (vertical display period+vertical non-display period) is smaller than the number of display dots (the physical resolution of the LCD) on the LCD in the vertical direction (for example, 640.times.400-dot display is performed by using an LCD having a display resolution of 640.times.480 dots). In this case, since non-display regions, each corresponding to 40 lines, are formed in upper and lower portions of the physical screen, a display interface circuit including a display timing generating circuit is considerably complicated.
In addition, a plurality of display resolutions are generally set in a system on the assumption that display operations are performed by a CRT display. For this reason, a vertical display period and a vertical non-display period are set for the CRT display. If, therefore, a 640.times.480-dot LCD is used to display a frame having another resolution (e.g., 640.times.400 dots), lines corresponding to pixels for which no display data are provided may not be driven. However, if the lines are not driven, inappropriate voltages are applied to liquid crystal portions corresponding to the lines, resulting in a deterioration in display quality. For this reason, in a conventional system, display timing signals for the respective display resolutions in a CRT display, and display timing signals for the respective display resolutions in an LCD are generated and set in a CRT controller, respectively. That is, a conventional LCD is driven at the optimal display timings for the LCD. Therefore, simultaneous display operations of the CRT display and the LCD cannot be performed.